This is Vivek Vikram Singh. Currently pursuing Master Of Engineering in Computer Science stream from BITS, Pilani. I strongly believe in contribution-based education and helping out fellow/upcoming graduates with the experience I have. I have shared my written and interview experience in various known institutes/ PSUs for my M.Tech. admission in 2014 Find me on my blog at: https://vivekvsingh14.wordpress.com/

### Alma Mater:

Master of Engineering
Birla Institute of Technology and Science, Pilani
2014 to 2016
Bachelor of Engineering
Bansal Institute of Science and Technology, Bhopal
2009 to 2013

### Experience:

Intern
EMC Corporation
2016
ASE
EMC Corporation
2016
Example text
1 year 6 months ago

RTT is always 2*PT.

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Example text
1 year 10 months ago

A = O(nlogn), B= O(n)

It is very trivial if you know the complexity concepts.

n=O(nlogn)

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1 year 10 months ago

#include #include int main() { int i; for (i=0; i<3; i++) { pid_t pid = fork(); if (pid == 0) printf("parent:[%d] current:[%d] i=%d\n", getppid(), getpid(), i); else printf("FORK Failed for current: %d\n", getpid()); printf("*\n"); } printf("HI \n"); return 0; }

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1 year 10 months ago

Tricky problem.

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Lakshminarayana Potukuchi
Virtual GATE
Priyesh Priyatam
Ranita Biswas
Pritam Prasun
Pritam Prasun
905
Rajeev
914
Priyesh Priyatam
923
Himanshi
976
jhilik
979
shailendra joshi
998
Mahesh Kumar
1017
Chandan Chawda
1019
kaushal
1022
Shabin Muhammed
1065
TarGate
1165
vineet
1238
Rahul Kumar
1246
Kalpish Singhal
1474
Target Gate
1518

## Pages

C is correct.

A) it will not contain only 1's which true for even number of 0s.It will surely have two 0's.

B) same story as A.

C) Correct.

D) Kind of same as A and B.

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If some one say FA that is implicitly NFA, while DFA is DFA.

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11 Feb 2015 - 2:18pm

Here is th link to previous papers of ISRO but do not take them as they are. See and observe them carefully and prepare for the worst case. All the best

http://www.techtud.com/computer-science#overlay=resource-share/isro-previous-year-paper-cs

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5 Feb 2015 - 6:10pm

Ans 2.

ID stage will detect hazard which will be related to ID stage functions that is Instruction Decoding and Register Read. If You carefully think then you will get to know that RAW  and WAR data hazards are something which are related to ID stage.In that too,WAR hazard will be related to Writing(4th stage) the Data ,by current instruction,into registers which is Already been read(2nd stage) by previous instruction. So no chance of hazard detection in this case.

You can easily see that there are 2 RAW hazard between ADD-SUB(r1) and SUB-MUL(r2).That is ID stage of SUB will detecting that result in R1 is not yet updated. Same for SUB-MUL.

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5 Feb 2015 - 6:02pm

You can check doubt sections and all the questions have been put there. People have already started discussing and mentors will be answering the official answers too.

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3 Feb 2015 - 10:53pm

Yeah, ca not see the picture.

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3 Feb 2015 - 5:47pm

In CSMA/CD , to transmit a frame, transmitter must seize the channel. In order to seize the channel , it must propagate Jamming signal upto RTT. This applies to receiver as well for acknowledgement.
So total time = Seize time of sender + TT of sender + PT +  Seize time of receiver + TT of receiver i.e. Ack transmission time  + PT.
Seize time  = 2* PT .
PT =  distance / Speed of signal
Signal speed =  200m/microsec = 2* 10^8 m/sec
PT = 10 microsec
Seize time for both sender and receiver = 2* PT =  20 microsec
TT of sender = 51.2 microsec
TT of receiver = 3.2 microsec
Total time = 20 + 51.2 + 10 + 20 + 3.2 + 10 = 114.4 microsec
useful time = TT of sender , exclduing header as it is also an overhead = (512- 32)/10Mbps = 48.0 microsec
efficiency = 48.0 / 114.4 = .4210
Effective data rate = 4.210 Mbps

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31 Jan 2015 - 12:49am

thats true. Is it Ace Academy test problem?

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30 Jan 2015 - 11:24pm

Please take a look at this example and try to solve accordingly.

http://www.techtud.com/doubts#overlay=doubt/virtual-gate-2015-question-38

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30 Jan 2015 - 3:58pm

If nothing mentioned about Flag, Addressing Mode field etc, then the solution goes like this above. If anything given , then you need to consider those bits too for solution.

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